SK hynix and Samsung began delivering engineering samples to Nvidia in late 2025, but with Nvidia demanding last-minute spec changes, those parts will now be insufficient for Rubin's requirements. Samsung is said to have a slight edge on qualification, due to its newer base die process and integration stack. Still, SK hynix is expected to retain the bulk of Nvidia’s business into 2026, given its existing allocation contracts.
This is not just about specs, however, but also Nvidia's broader control over memory ecosystems. Its sheer amount of purchasing power gives the company the leverage to shape JEDEC standards, dictate packaging needs, and pace supplier production cycles. NVIDIA accounts for over 60% of global HBM consumption in 2024, according to Morgan Stanley, and TSMC’s advanced packaging nodes — especially CoWoS — are already fully committed to Nvidia’s Blackwell and Grace Hopper-class parts. Moving to Rubin and HBM4 implies even greater substrate complexity, requiring further capacity expansion at both the foundry and substrate partner levels
Nvidia confirmed at CES that Rubin silicon is already in full production ; however, system-level availability won’t follow until much later in the year, largely due to memory and interconnect bottlenecks. Rubin will ship with up to 288 GB of HBM4 and will rely on revised versions of Nvidia’s NVLink interconnect, optimized for the increased bandwidth profile. Early Rubin configurations are expected to pair with Grace CPUs via a refreshed NVLink architecture, allowing up to 900 GB/s of coherent bandwidth per link.
The delay offers both a challenge and a reprieve for vendors. The challenge lies in redesigning HBM4 dies to meet Nvidia’s updated timing and signal integrity requirements, but the reprieve comes in the form of extra runway — most HBM3 and HBM3e nodes are now sold out through late 2026 , and the additional time allows vendors to optimize yields and scale packaging operations.
SK hynix will continue shipping the lion’s share of HBM volume throughout the quarter; it has a deep allocation pipeline with Nvidia and has committed the majority of its high-end DRAM lines to HBM production. Samsung, which initially expected HBM4 to arrive by 2025 , has increased its cadence significantly and is now expected to reach high-volume HBM4 qualification sometime in Q2 2026. Micron is simultaneously ramping 11 Gbps-class HBM4 and sampling early HBM4E products with up to 16 dies and extended bandwidth ceilings.
JEDEC ratified the HBM4 standard in April 2025, specifying 2048-bit interfaces and per-pin speeds beginning at 6.4 Gbps, scaling up to over 12 Gbps. With Rubin and other high-performance AI accelerators now targeting 13 Gbps or higher, vendors are pushing the upper limits of thermal and power envelopes. Micron has said that it expects 64GB stacks to become common with HBM4E sometime after late 2027. Meanwhile, each Rubin GPU package on the NVL72 will have eight stacks of HBM4 memory delivering 288GB of capacity and 22 TB/s of bandwidth.
The delay also allows some equilibrium to form in packaging. TSMC’s CoWoS-L capacity has been under severe pressure due to Nvidia’s Blackwell and AMD’s MI300 ramp . By spacing out Rubin’s arrival, Nvidia is implicitly giving its suppliers time to expand interposer and bumping operations without triggering yield degradation or substrate shortages.
HBM undergoes major architectural shakeup as TSMC and GUC detail HBM4, HBM4E and C-HBM4E
Nvidia's focus on rack-scale AI systems is a portent for the year to come
Key considerations
- Investor positioning can change fast
- Volatility remains possible near catalysts
- Macro rates and liquidity can dominate flows
Reference reading
- https://www.tomshardware.com/tech-industry/SPONSORED_LINK_URL
- https://www.tomshardware.com/tech-industry/hbm4-mass-production-delayed-as-nvidia-pushes-memory-specs-higher#main
- https://www.tomshardware.com
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Informational only. No financial advice. Do your own research.