Harvard researchers hail quantum computing breakthrough with a machine that can run for two hours
The new processor will play a central role in IBM’s campaign to demonstrate a verified quantum advantage, which the company now says it expects to achieve by the end of 2026. To support that claim, it has backed the formation of an open “quantum advantage tracker,” inviting third-party researchers to test candidate workloads against classical baselines. Early example circuits from partners, including Algorithmiq and the Flatiron Institute, have already been submitted, focusing on observable estimation and constrained optimization problems.
IBM’s timeline includes further performance gains beyond the current 5,000-gate target. The company expects iterative improvements to push that figure to 7,500 gates in 2026 and 10,000 by 2027, without increasing qubit count. These are incremental steps, but they align with the broader strategy IBM has laid out for gradually improving fidelity and circuit depth while using real benchmarks to validate progress against classical solvers.
While Nighthawk represents IBM’s best shot at a near-term quantum advantage, the company’s ambitions rest on a longer arc toward fault-tolerant quantum systems. IBM’s engineers believe they’ll get there by the end of the decade, and this week’s preview of the “IBM Quantum Loon” test chip hints at what that system might look like.
Loon is a proof-of-concept superconducting test chip built to validate the hardware components required for scalable quantum error correction. IBM says the processor will include architectural features such as long-range inter-qubit couplers — known as “C-couplers” — designed to enable the efficient implementation of quantum low-density parity-check (qLDPC) codes.
IBM has previously demonstrated its ability to achieve 6-way qubit connections, increase layers of routing on the chip surface, and build reset gadgets that reset the qubit to ground state. “With Loon, for the first time, we test all these features together, aided by new electronic design automation (EDA) to realize more complex architectures than ever before,” says Ryan Mandelbaum , Editor in Chief of IBM Quantum.
On the control side, IBM also announced that its latest classical decoder design, implemented on an AMD FPGA, can process error syndromes in under 480 nanoseconds. That performance is roughly ten times faster than previous iterations and meets the latency threshold required for practical error correction on superconducting hardware. The company says this milestone was reached a year ahead of schedule and will form the basis of future real-time decoding logic for larger fault-tolerant systems.
IBM’s hardware roadmap calls for a series of increasingly modular systems starting in 2026. That includes “Kookaburra,” the company’s first prototype for logical qubit storage, and “Cockatoo,” a 2027 multi-chip device intended to demonstrate entanglement between separate processors. By 2029, the company expects to ship “Starling,” a 1,000-qubit system with 200 error-corrected logical qubits capable of performing more than 100 million operations per job.
New Chinese optical quantum chip allegedly 1,000x faster than Nvidia GPUs for processing AI workloads
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Key considerations
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Reference reading
- https://www.tomshardware.com/tech-industry/semiconductors/SPONSORED_LINK_URL
- https://www.tomshardware.com/tech-industry/semiconductors/ibm-unveils-new-120-qubit-processor-and-software-stack#main
- https://www.tomshardware.com
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