
2D materials are getting closer to manufacturability using industry-standard equipment.
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(Image credit: Intel) Share Share by: Copy link Facebook X Whatsapp Reddit Flipboard Share this article Join the conversation Follow us Add us as a preferred source on Google 2D transistors based on 2D materials have been demonstrated in academia and research labs for more than a decade, but none of these demonstrations were compatible with high-volume semiconductor manufacturing, as they relied on small wafers, custom research tools, and fragile process steps. But this week, Intel Foundry and imec demonstrated a 300-millimeter–ready integration of critical process modules for 2D field-effect transistors (2DFETs), indicating that 2D materials and 2DFETs are moving closer to reality.
Modern leading-edge logic process technologies — such as Intel's 18A, Samsung SF3E, TSMC's N2 — rely on gate-all-around (GAA) devices, and all leading chipmakers are also developing complementary FETs (CFETs) to vertically stack transistors to extend density gains beyond what is possible with GAA. CFETs are considered the next step beyond gate-all-around transistors and are expected to emerge in the next decade. However, Intel and other chipmakers argue that continued scaling will eventually push silicon channels to their physical limits, where electrostatic control and carrier mobility degrade due to extremely small dimensions. To address this, the industry is increasingly evaluating 2D materials, which can form channels only a few atoms thick while maintaining strong current control.
Intel and Imec presented a paper at IDM that details their work on the family of transition-metal dichalcogenides (TMDs). In the demonstrated structures, WS₂ and MoS₂ were used for n-type transistors, while WSe₂ served as the p-type channel material. Although these compounds have been studied for years, the main challenge has been integrating them into a 300-mm wafer fab flow without damaging the fragile channels or relying on processing steps that cannot be reliably performed in a high-volume manufacturing environment.
Researchers achieve breakthrough integration of 2D materials on standard silicon chips
First truly 3D chip fabbed at US foundry, features carbon nanotube transistors and RAM on a single die
Chip designer Jim Keller says Intel still has 'a lot of work to do'
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Reference reading
- https://www.tomshardware.com/tech-industry/semiconductors/SPONSORED_LINK_URL
- https://www.tomshardware.com/tech-industry/semiconductors/intel-shows-300-mm-fab-compatible-integration-of-2d-transistor-contacts-and-gate-stacks#main
- https://www.tomshardware.com
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