
Anton Shilov is a contributing writer at Tom\u2019s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends. ","collapsible":{"enabled":true,"maxHeight":250,"readMoreText":"Read more","readLessText":"Read less"}}), "https://slice.vanilla.futurecdn.net/13-4-13/js/authorBio.js"); } else { console.error('%c FTE ','background: #9306F9; color: #ffffff','no lazy slice hydration function available'); } Anton Shilov Social Links Navigation Contributing Writer Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.
rluker5 Compute tile made at both fabs, interesting. If 18a is used for mobile, maybe next year there will be an Erying mobo with one and maybe they could be compared on a.more apples to apples basis. Reply
bit_user The article said: When implemented on TSMC's N2 manufacturing technology, Nova Lake's compute tile with eight high-performance Coyote Cove P-cores and 32 energy-efficient Arctic Wolf E-cores measures over 110 mm² The Zen 6 CCD is rumored to be just 76 mm², on TSMC N2, featuring 12 big cores (source: https://www.techpowerup.com/345839/amd-zen-6-ccd-packs-12-cores-48-mb-l3-cache ). That doesn't surprise me, given that Zen cores have always been a little bit narrower than competing Intel P-cores and Intel's E-cores are starting to get rather large. Reply
thestryker Given that Jaykihn's estimate was ~94 mm² this is a pretty significant difference. Makes me wonder if we're talking manufacturing node differences or if one of them is just wrong. Reply
JRStern thestryker said: Given that Jaykihn's estimate was ~94 mm² this is a pretty significant difference. Makes me wonder if we're talking manufacturing node differences or if one of them is just wrong. Could it be cold silicon? Spread the circuitry out a little for heat management? Then you might get a big tile with the (better) yield of a smaller tile. You waste a little silicon but that's almost trivial in the complete process. Reply
bit_user JRStern said: Could it be cold silicon? Spread the circuitry out a little for heat management? That might influence the layout of cores vs. cache, but there's no chance it's going to actually have just dark silicon. Reply
palladin9479 Why so many e cores? All that does is win synthetic benchmarks but, as demonstrated by AMD x3d models, it won't drive much else. 8 p cores are 4-8 e cores are more then sufficient for any consumer compute task. Anything benefiting from more slow e cores would be better run on a dGPU with thousands of such cores. Reply
bit_user palladin9479 said: Why so many e cores? All that does is win synthetic benchmarks but, as demonstrated by AMD x3d models, it won't drive much else. The E-cores in my Alder Lake i9 development machine definitely improve compile times on large software projects, which is the main thing I use it for. I've played around with using taskset to restrict compilation to different groups of cores, and the E-cores easily pull their weight! In fact, I wanted to do a CPU upgrade to Raptor Lake, mainly just to get more E-cores. Sadly, it's a Dell and its BIOS won't allow a CPU upgrade on that motherboard. Somebody actually tried it, and the BIOS refused to boot. I checked and I have the same motherboard revision as theirs. Reply
thestryker palladin9479 said: Why so many e cores? It's pretty simple: Intel is keeping their 8P/16E design Compute Tile design and they're not going to arbitrarily disable a bunch of E-cores when using two of them. palladin9479 said: All that does is win synthetic benchmarks but, as demonstrated by AMD x3d models, it won't drive much else. By this logic why does AMD have 16 core parts (let alone the very likely forthcoming 24 core)? In the case of these dual Compute Tile parts they seem likely aimed at people who do more production oriented things but don't need additional memory bandwidth or PCIe connectivity. A 52 core NVL part should be faster in MT than all but 2 of the workstation Xeon 6 parts launching this year and it'll be much faster than any of them in lighter and ST workloads. Reply
JRStern bit_user said: That might influence the layout of cores vs. cache, but there's no chance it's going to actually have just dark silicon. Wait and see, even if it's just a bit around the edges, maybe an island near dead center. Reply
Key considerations
- Investor positioning can change fast
- Volatility remains possible near catalysts
- Macro rates and liquidity can dominate flows
Reference reading
- https://www.tomshardware.com/pc-components/cpus/SPONSORED_LINK_URL
- https://www.tomshardware.com/pc-components/cpus/intel-nova-lake-die-sizes-leak-signaling-higher-cost-smaller-compute-tile-still-demands-higher-price-on-tsmc-n2#main
- https://www.tomshardware.com
- Leading Inference Providers Cut AI Costs by up to 10x With Open Source Models on NVIDIA Blackwell
- U.S., Taiwan ink trade deal after months of talks — agreement cuts tariffs on Taiwanese goods to 15% in exchange for direct investments on U.S. tech sector, sem
- Rapidus targets mass 2nm chip production in 2027, quadruples capacity ramp up — company plans to scale to 25,000 wafer starts per month in just one year
- Accelerating Science: A Blueprint for a Renewed National Quantum Initiative
- Nvidia DGX Spark update cuts idle power by 32% or more — hot-plug detection on ConnectX NIC makes for a more efficient AI workstation
Informational only. No financial advice. Do your own research.