CEO Atsuyoshi Koike said at a press conference on Thursday, February 26, that Rapidus is in active discussions with more than 60 companies looking to design chips for AI, robotics, and edge computing. "Since the start of the year, customers' demands for cutting-edge chips have surged," Koike said, adding that interest in 2nm specifically had intensified and that the company intends to push on to 1.4nm and 1nm nodes after that.
This latest round of government funding comes on the back of real technical progress. Rapidus opened its pilot line in April 2025 and demonstrated working 2nm gate-all-around (GAA) transistors — an architecture that surrounds the transistor channel on all four sides rather than three, improving current control and reducing leakage compared to FinFET designs — shortly after, in July. The company uses High-NA EUV lithography equipment from ASML at the Hokkaido facility, and IBM is understood to have roughly 10 engineers stationed on-site as part of an ongoing technology transfer partnership.
As we reported earlier this month, Rapidus plans to start mass production at an initial rate of 6,000 12-inch wafers per month, scaling to approximately 25,000 within the first year . Total investment needed to reach that point is estimated at around ¥4 trillion; roughly ¥1.7 trillion has been committed from all sources to date.
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- https://www.tomshardware.com/tech-industry/semiconductors/SPONSORED_LINK_URL
- https://www.tomshardware.com/tech-industry/semiconductors/rapidus-secures-1-7-billion-from-japans-government-and-private-investors#main
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