When a new leading-edge production technology like 18A enters volume production, yields typically rise by a predictable improvement curve every month. A 7% yield improvement per month is normal for the middle phase of the ramp, though it is generally lower in the early and late phases as yield-curves tend to be S-shaped.
Intel says that 18A is now following this exact 7% trend for Panther Lake, which is important because past Intel nodes failed to do so and demonstrated chaotic yield improvements or even drops. This is famously why Intel cancelled 20A a little over a year ago; using chips with such a risky yield meant the product schedule was insecure. Hitting the 'industry-normal' yield ramp means the process is stable, and Intel can predict where it is going to be with Panther Lake yields a quarter or two down the road.
An avid reader might ask why Intel measures yield improvement per month, while modern process technologies (e.g., TSMC N3 or Intel 18A) have cycles that are around 120 days long. This actually happens because fabs track the defect density (D0) and process quality at the moment wafers enter the line, not when they finish.
Chipmakers tend to implement fixes — lithography tuning, etch-uniformity adjustments, systematic-defect removal — that immediately change defect density and the projected final yield of wafers started that month, even though those wafers will not complete for another three or four months. Since these changes reduce defects continuously, chipmakers can calculate the expected yield right away using standard yield models. Hence, once Intel's models show continuous improvements for 18A in general and Panther Lake compute tile in particular, the company can safely launch the CPU commercially.
Of course, when we talk about any yield-improvement curve, an elephant in the room is the starting point. If we start from 25% and improve yields by 7% per month, we reach an industry normal 85% good die yield in 8.5 – 9 months, sometime in early fall 2026. Meanwhile, Intel itself claims that 18A will reach industry standard yields in early 2027 , which means that for now, yields are probably 10% to 15%.
Starting quasi volume production with low yields at a development fab is a good way to skyrocket costs; D1D's pilot lines are designed not for efficiency but rather for maximum flexibility, to maximize yields. Intel notes that it will start making compute tiles for Panther Lake in early 2026 at Fab 52, which given the S-shaped good-die yield curve, will be around the time when PNL's GDY hits stable 20% – 25%.
While initiating mass production with such a yield means high costs, retaining production at pilot lines is still more expensive, so moving production of Panther Lake's compute tiles to Arizona makes great sense for Intel. Furthermore, high-volume fabs tend to reveal systematic issues that occur with a process technology, which lets the company perform continuous process improvements to ramp yields and lower performance variations through statistical process control, something impossible to do at pilot lines.
Of course, using a high-volume fab with low yields will hit Intel's bottom line heavily, but this is inevitable.
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Anton Shilov Social Links Navigation Contributing Writer Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.
ezst036 Intel fired Pat Gelsinger way too soon. Reply
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- https://www.tomshardware.com/pc-components/cpus/the-panther-stalks-intels-panther-lake-cpus-set-to-take-off-in-oregon-company-reveals-and-cutting-edge-18a-process-is-on-track#main
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