AMD reveals new roadmap for its Ryzen CPUs, teasing Zen 7 as the true “next-generation” leap with 2nm — Lineup confirms 2026 release for Zen 6, coming with expa

AMD reveals new roadmap for its Ryzen CPUs, teasing Zen 7 as the true "next-generation" leap with 2nm — Lineup confirms 2026 release for Zen 6, coming with expa

Hassam Nasir Social Links Navigation Contributing Writer Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When he’s not working, you’ll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.

KraakBal Zen 6 should be 6.5ghz+ apparently (~2.5 node jumps, and GAA transistors), and going to be 12 core ccds, and finally get a new IO die. And zen 7 going to be another 20% overall perf improvement on top of that. My "new" PC is aging faster, or falling behind faster, than my old one did Reply

bit_user I had a chuckle at how many times they worked "AI" into the slide. The mention of "New Matrix Engine" makes me wonder if they're implementing AMX in Zen 7. Reply

Makaveli KraakBal said: Zen 6 should be 6.5ghz+ apparently (~2.5 node jumps, and GAA transistors), and going to be 12 core ccds, and finally get a new IO die. And zen 7 going to be another 20% overall perf improvement on top of that. My "new" PC is aging faster, or falling behind faster, than my old one did I'm going abit more conservative on clocks. Base clocks on a 9800X3D is 4.7ghz at 8 cores. With 12 cores lets say base clocks between 5-5.4Ghz and boost to 6-6.2Ghz. Reply

-Fran- Makaveli said: I'm going abit more conservative on clocks. Base clocks on a 9800X3D is 4.7ghz at 8 cores. With 12 cores lets say base clocks between 5-5.4Ghz and boost to 6-6.2Ghz. Depends on the power they want to target… Or the "TDP". My 9950X3D happily goes to 5.6Ghz all core under load. Yes, that is all 16 cores at 5.6Ghz under full load (CB24, Prime and OCCT) with a -30 all-core voltage reduction. The power draw is around 260W, but it's reasonable for all 16 cores at 100%. I can absolutely see them tweaking transistors for higher clocks and not caring too much about power leaving it to silicon lotery on the consumer side and having 6.5Ghz boost easily. The node jump is quite substantial and it'll show. They're also changing some internal connectivity for the dies, so it'll potentially ease the power balance within the SoC so they can get more clocks out of it. So: clock tweaking, almost a 2-gen equivalent node jump should be around 500Mhz to 1Ghz clock boost for single looking at past jumps and extrapolating a bit. Regards. Reply

SomeoneElse23 -Fran- said: My 9950X3D happily goes to 5.6Ghz all core under load. Yes, that is all 16 cores at 5.6Ghz under full load (CB24, Prime and OCCT) with a -30 all-core voltage reduction. I have a similar experience with my 9950X (non 3d). It's amazing how fast this thing runs. (I upgraded from a 5950X…) Reply

bit_user -Fran- said: Depends on the power they want to target… Or the "TDP". My 9950X3D happily goes to 5.6Ghz all core under load. Yes, that is all 16 cores at 5.6Ghz under full load (CB24, Prime and OCCT) with a -30 all-core voltage reduction. The power draw is around 260W, but it's reasonable for all 16 cores at 100%. Wow, impressive! -Fran- said: I can absolutely see them tweaking transistors for higher clocks and not caring too much about power leaving it to silicon lotery on the consumer side and having 6.5Ghz boost easily. The node jump is quite substantial and it'll show. They're also changing some internal connectivity for the dies, so it'll potentially ease the power balance within the SoC so they can get more clocks out of it. So: clock tweaking, almost a 2-gen equivalent node jump should be around 500Mhz to 1Ghz clock boost for single looking at past jumps and extrapolating a bit. Eh, I'm just not sure clock speed is where it's at, these days. These chiplets are really made for servers, which don't achieve clocks anywhere near as high as the desktop CPUs. So, they don't really have incentives to chase clock speeds too aggressively. I'd guess more along the lines of a 500 MHz increase. Reply

-Fran- bit_user said: Eh, I'm just not sure clock speed is where it's at, these days. These chiplets are really made for servers, which don't achieve clocks anywhere near as high as the desktop CPUs. So, they don't really have incentives to chase clock speeds too aggressively. I'd guess more along the lines of a 500 MHz increase. For sure. The obvious elephant in the room is: "ok, if they tweak for all the Hertz, what will they be sacrificing?" Efficiency the most likely victim, but I doubt Intel would be able to compete vis a vis in the X86 market for average to peak power. I'm sure they'll leave Zen6C for mobile and where they need the effiency the most. Sacrificing pipeline length and going the "speed demon" approach would seem like a regression to me in the overall design of Zen, but what do I know. So far, they've kept it around 19 stages long, right? More stages, more latency, but higher theoretical speed. Or something along those lines, I can't quite remember how it all balances out. Regards. Reply

Zaranthos The Matrix and Skynet merge in 2027 with full advanced AI. I want to be someone important, like an actor… Reply

russell_john bit_user said: I had a chuckle at how many times they worked "AI" into the slide. The mention of "New Matrix Engine" makes me wonder if they're implementing AMX in Zen 7. I suspect what they are going to do is add a NPU like we are already seeing with CPUs in CoPilot+ branded laptops. Microsoft needs to have a CPU with an NPU onboard in order for their CoPilot AI Slop to work efficiently. Some people think I kidding when I say that Windows 12 will likely have a requirement for having a CPU with a NPU built into it. They need a way to built a neural network without bogging down the CPU or needing to leverage a GPU which would also bog things down. Reply

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