Nvidia's slide does a good job illustrating, but it's worth noting the difference compared to traditional SMT nonetheless. With traditional SMT, resources are time-sliced between threads, leading to gaps between BP and decode, as illustrated in the slide. With spatial multithreading in Vera, threads are still fighting for resources within the core. However, spatial multithreading allows Nvidia to deal with the demand of neighboring threads in a deterministic way, leading to a more consistent downturn in per-core performance when the second thread is working.
Nvidia's second-gen Scalable Coherency Fabric (SCF) moves data across the die. Nvidia didn't provide any new disclosures around SCF at Hot Chips, but you can see how the fabric is laid out in the slide below. Centralized Coherency Switch Nodes (CSNs) connect the cores to pools of L3 cache totaling 164 MB and the broader memory subsystem.
At a system level, one of the more interesting choices Nvidia made was to use LPDDR5X as opposed to traditional RDIMMs, a choice that it was only able to make due to the serviceable SOCAMM2 design. Nvidia includes eight SOCAMM2 slots per Vera CPU on a board, offering up to 1.5 TB of capacity with 1.2 TB/s of bandwidth.
LPDDR5X can deliver transfer rates higher than DDR5 RDIMMs, at least compared to single-rank DIMMs. However, it seems the driving force behind LPDDR5X wasn't performance but rather power consumption. One of the pillars of Vera, according to Nvidia's Hot Chips presentation, was to deliver a CPU for power-limited data centers. Micron says its LPDDR5X consumes about a third of the power compared to a traditional RDIMM.
Nvidia demonstrated that point a little differently, using bandwidth per watt as a point of comparison between the LPDDR5X system in Vera and traditional RDIMMs. This illustration does the job, though it could be a bit misleading, measuring power draw against peak bandwidth.
Nvidia tells us that a fully loaded memory system with Vera consumes between 30W and 40W, with 1.5 TB at 9600 MT/s. Power demands for RDIMMs vary wildly depending on capacity, channels, and transfer rate, though power consumption can easily climb over 100W depending on the configuration.
Although Nvidia has deployed Grace in the data center — to the tune of "hundreds of thousands" of standalone servers , apparently — Vera represents Nvidia's first big push to gobble up market share in the expanding agentic CPU market. It's highly targeted, as evidenced by the fact that Nvidia is only delivering a single 88-core SKU, and it's already being put to use in large-scale deployments, with Nvidia announcing yesterday a deployment of Vera at SpaceXAI .
Nvidia has shared the slide above before, which it once again showed at Hot Chips 2026. It's normalizing per-core performance in SPEC CPU 2026 against the AMD EPYC 9755. The core differences explain the big disparity in numbers; in reality, Vera led in overall score by 3%. Regardless, this is the slide Nvidia is using to pitch Vera, claiming it offers a big improvement in the workloads that are most relevant for agentic AI.
The most formidable opponent for Vera isn't Turin, however. It's Venice, which AMD launched in June, and Diamond Rapids , which Intel detailed just moments after Nvidia left the stage. Vera has a lot of interesting talking points already, but it'll be interesting to watch how Nvidia scales (or doesn't scale) its data center CPU business over the next few generations. Perhaps we'll see the firm double down on these agentic workflows, or maybe concessions and product segmentation to appeal to hyperscalers. Time will tell.
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TOPICS Data Center See all comments (0) Jake Roach Social Links Navigation Senior Analyst, CPUs Jake Roach is the Senior CPU Analyst at Tom’s Hardware, writing reviews, news, and features about the latest consumer and workstation processors.
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