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"Micron invented 4F² DRAM," said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event on Wednesday. "The path with 4F² DRAM is always been an option through time, and we have evaluated it and not pursued it due to increased complexity and cost through this past two-decade period of time."
Interestingly, both Samsung and SK hynix still have 4F² memory cells in their roadmaps (according to TechInsights), so Micron's rejection of the technology puts the company on a unique trajectory. Several years ago, the company delayed integration of EUV lithography into its manufacturing flow , contrary to what its rivals did, and still managed to retain competitive positions both in terms of costs and in terms of performance. Therefore, skipping 4F² memory cells is not completely surprising.
The main attraction of 4F² DRAM is its theoretically smaller memory cell. The 4F² naming refers to a cell area equivalent to four times the square of the minimum lithographic feature size (F), compared with six times F² for conventional DRAM.
At identical feature dimensions, a 4F² cell occupies approximately 33% less area than a 6F² cell, which could theoretically increase the number of memory cells per wafer by 50%. Such an improvement would reduce manufacturing costs per bit and increase per-device memory capacity even without an equivalent reduction in feature dimensions. However, to make these advantages possible, DRAM makers must develop a suitable transistor architecture and a sufficiently compact capacitor arrangement. This is not easy at all.
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The CTO of Micron says that the theoretical advantages of 4F² DRAM do not necessarily translate into higher memory density in practice. DeBoer explained that dimensions and pitch of DRAM capacitors, rather than the nominal area of DRAM transistors, ultimately determine how many memory cells can fit on a wafer. Both 4F² and 6F² transistor structures must fit beneath the capacitors, which means that reducing transistor area alone does not guarantee a corresponding reduction in overall cell size because transistors need a capacitor. Furthermore, Micron believes that 4F² introduces additional manufacturing steps and complexity that increase costs without delivering sufficient benefits.
"It is important to understand the capacitor pitch, the capacitor size, and dimensions, is what sets the DRAM bit density, not whether it is 6F², 4F², 8F²," DeBoer said. "From our investigation of this technology over the past couple of decades, it is a bit of a myth that 4F² actually provides anything versus 6F². It is capacitor pitch that defines the DRAM. You can build the cells, the transistors underlying them in different ways, but they still have to fit under the capacitor pitch, which sets the DRAM [cell size]. So, some of that is just smoke and mirrors in terms of talking about 6F² versus 4F²."
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Reference reading
- https://www.tomshardware.com/pc-components/dram/SPONSORED_LINK_URL
- https://www.tomshardware.com/pc-components/dram/micron-pulls-the-plug-on-future-4f2-dram-after-two-decades-of-research-in-dramatic-shift-company-says-architecture-offers-no-meaningful-density-advantages-increases-manufacturing-complexity-and-costs-and-has-fundamental-scaling-limitations#main
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