Intel and ASML have been working towards this milestone for several years. In 2024, Intel completed installation of one of the industry's first commercial High NA EUV lithography systems , the TWINSCAN EXE:5000, at its Hillsboro, Oregon, research and development facility. The company later became the first to qualify ASML's second-generation TWINSCAN EXE:5200B , which increases wafer throughput and overlay accuracy while incorporating an improved EUV light source over its predecessor.
While the announcement represents High NA EUV's commercial debut, it does not mean Panther Lake is manufactured entirely using the new lithography platform. Instead, Intel has qualified High NA for selected layers, an approach that mirrors how new lithography generations are typically introduced into advanced semiconductor production before broader adoption across future nodes.
Intel Foundry Executive Vice President and General Manager Naga Chandrasekaran said that qualifying the High NA process option on selected Intel 18A product layers enables the company's existing tool fleet to deliver higher manufacturing output while providing flexibility for future process technologies.
Panther Lake itself is not a future product. Intel launched Core Ultra Series 3 at CES on January 5, 2026, opened preorders the following day, and put systems on shelves globally from January 27. The Core Ultra X9 378H followed in April alongside the value-tier Core Series 3, code-named Wildcat Lake, and the handheld-focused Arc G3 parts arrived on May 28.
The announcement’s statement that the product is shipping to customers refers to wafer flow from the fab into the supply chain, rather than to a product launch. ASML says the two companies will continue working on High NA readiness, with the flexibility to incorporate the technology into future nodes based on customer needs — most immediately, Intel 14A , which Intel has designed to use High NA on a set of its tightest-pitch layers.
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Etiido Uko is a news contributor for Tom's Hardware covering the latest updates in big tech and the PC industry. He is a mechanical engineer and senior technical writer with over nine years of experience in documentation and reporting. He is deeply passionate about all things engineering and technology, and is an expert in gadgets, manufacturing, robotics, automotive, and aerospace. ","collapsible":{"enabled":true,"maxHeight":250,"readMoreText":"Read more","readLessText":"Read less"}}), "https://slice.vanilla.futurecdn.net/13-4-25/js/authorBio.js"); } else { console.error('%c FTE ','background: #9306F9; color: #ffffff','no lazy slice hydration function available'); } Etiido Uko Social Links Navigation News Contributor Etiido Uko is a news contributor for Tom's Hardware covering the latest updates in big tech and the PC industry. He is a mechanical engineer and senior technical writer with over nine years of experience in documentation and reporting. He is deeply passionate about all things engineering and technology, and is an expert in gadgets, manufacturing, robotics, automotive, and aerospace.
usertests Would this be a new stepping with subtle benefits, such as increased power efficiency? Reply
JRStern usertests said: Would this be a new stepping with subtle benefits, such as increased power efficiency? Probably not, if the part is dual-qualified it is not taking advantage of any additional features of the high NA. Hopefully the advantage is single-pattern instead of dual-pattern so faster processing and perhaps equal or better yield, too. Reply
thestryker With the volume of wafers Intel has been running through High-NA combined with no firm commitment to 14A it makes sense that they'd be qualifying it for products using 18A. While it shouldn't mean anything for existing products they could potentially leverage the differences down the road if it was planned for in advance. I would expect anything like that to be relatively lower in volume though because the Hillsboro development fab is the only one equipped with High-NA and if 14A happens they'll need the capacity. Reply
jkflipflop98 usertests said: Would this be a new stepping with subtle benefits, such as increased power efficiency? At this point it's simply less patterning/etch steps. Better yields and faster processing times. The characteristics of the parts should be the same. Reply
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