When we normally describe 3D NAND memory, we usually mention all possible applications, which include high-end consumer SSDs (after all, we are Tom's Hardware, we are hardware enthusiasts!) and data center drives. We did not mention consumer applications for BiCS10 for a very specific reason: Kioxia does not position this generation for client devices and only targets data center-grade drives. Whether or not to expect BiCS10 on a high-performance SSD near you probably depends on supply and demand, given the current market circumstances.
While the BiCS10 332-layer 3D NAND boosts bit density by 59% all the way to over 29 Gb/mm², it also promises to deliver meaningful performance and efficiency gains specifically for enterprise applications. Kioxia claims read latency drops by around 4 microseconds (about 10%), while read energy consumption is reduced by 25%, from roughly 100 mJ/GB to approximately 75 mJ/GB.
According to Kioxia, these improvements stem from a redesigned read scheme that changes how unselected word lines behave during consecutive read operations. In a 332-layer NAND stack, a significant portion of read latency and power consumption is associated with repeatedly charging long word lines from ground (VSS) to the read voltage (VREAD).
Solidigm VP talks PCIe 6.0 SSDs, next-gen floating gate NAND, liquid cooled storage and more
Huawei develops 122TB SSD with new packaging tech to sidestep US sanctions on 3D NAND chips
SMI's PCIe 6.0 SSD controller for consumer SSDs coming next year, but severe NAND shortages will get even worse in 2027 as AI data centers swallow supply
Normally, NAND memory discharges its wordlines to ground (VSS) after every read, which is a general-purpose approach that works regardless of what the next operation is. However, there is no need to discharge at all times. Therefore, during continuous read operations, the word lines are not fully discharged in the case of BiCS10. Instead, they are lowered to an intermediate voltage and then raised back to VREAD for the next read, which makes a lot of sense for read-heavy applications (most cloud applications are).
After the initial read, the circuitry reduces the word-line voltage only to an intermediate level instead of completely discharging it to VSS. Before the next access, the voltage is restored to VREAD from that intermediate level rather than from ground. Since the voltage excursion is considerably smaller, the word lines recharge more quickly and require less current, which improves both read latency and energy efficiency. The approach is particularly beneficial for very tall 3D NAND stacks, where long word lines amplify charging delays and power losses during sustained sequential read workloads.
Get Tom's Hardware's best news and in-depth reviews, straight to your inbox.
Key considerations
- Investor positioning can change fast
- Volatility remains possible near catalysts
- Macro rates and liquidity can dominate flows
Reference reading
- https://www.tomshardware.com/pc-components/ssds/SPONSORED_LINK_URL
- https://www.tomshardware.com/pc-components/ssds/kioxia-and-sandisk-sample-worlds-densest-3d-nand-new-332-layer-beats-samsungs-400-layer-nand#main
- https://www.tomshardware.com/membership
- NVIDIA BioNeMo Agent Toolkit Brings Accelerated AI to Life Sciences Researchers in Claude Science
- Space Force gets first mobile high-powered electromagnetic beam weapon to cripple enemy satellites — plans to deploy 32 ‘Meadowlands’ units to detect, deny, dis
- Companies are now using automatic Windows installers to display Adware through the Microsoft Store when you install new hardware — customer immediately gets McA
- Intel patent reveals new XBM memory architecture that ditches HBM's costly silicon interposer — backend-transistor DRAM stack uses UCIe links and built-in repai
- Save $527 on this 1440p gaming PC from Newegg with a 16GB RTX 5060 Ti right now — huge discount for high-end performance rig with an Intel Core i7-14700F, 32GB
Informational only. No financial advice. Do your own research.