Synopsys validates a PCIe 6.0 PHY inside a face-to-face 3D stack at 64 GT/s — says it got there by pulling apart an existing 2D test chip

In monolithic chips, PCIe PHYs sit at the perimeter of the die, right next to the package I/O connections, helping keep traces to the substrate short so attenuation and reflections remain manageable. A 2.5D package prese…

Samsung raises advanced foundry prices by up to 15% as AI demand fills its 4nm lines, report claims — Chinese customers accepting the largest hikes

Customers in China and the U.S. saw quotes for the 4nm SF4 process climb 10% to 15% from June, while customers in Taiwan saw smaller increases of 5% to 10%, one source said. Wafers on the 5nm SF5 process rose 10% to 15%,…